ISA x Performance

Question

How can the amount of instructions (ISA) affect a system’s performance analysis? Compiler can help improve results?

Answer 1

ISA means "Instruction Set Architecture" - "Architecture of Instruction Set". There are two types of architectures to consider: RISC and CISC.

The CISC means "Complex Instruction Set Computer" - "Computer with Complex Instruction Set". This type of computer features several types of encoded microinstructions within the processor. Sometimes the number of different types of instructions are in the hundreds and often they have quite varied shapes and sizes. However, due to the large number of instructions, the processor design ends up being quite complicated and the instructions can take some significant time to be decoded and interpreted, most of them taking several clock cycles to complete.

The RISC means "Reduced Instruction Set Computer" - "Computer with Reduced Instruction Set". This type of computer presents only a few types of encoded microinstructions within the processor. Because of this, these instructions have uniform format and size, which also greatly simplifies the processor design and simplifies the decoding and execution of them. Sometimes all or almost all of them take the same time to be executed.

There is also a hybrid architecture consisting of a two-tier processor, the external CISC and the internal RISC. In this processor, each CISC instruction is translated into a sequence of RISC instructions that are then executed. Encoded in processor circuits, there is a table called microcode that is used to translate each CISC instruction into a sequence of RISC instructions.

Other architectures are also possible, especially with regard to parallel processing.

Note that this says nothing about performance. Having a large number of possible instructions makes each one of them extremely optimized in the name of better performance, allowing the compiler when generating the code, a wide range of possible instructions to be chosen and combined. But this greatly complicates the processor design and can bring a cost in performance because of the complexity. With the instruction set reduced, a larger number of instructions is required to be executed to do some useful work, but these instructions are quite simple.

Any algorithm to perform a task, when written in a sequence of CISC instructions, is usually much smaller than in a sequence of RISC instructions. The reason for this is precisely because a CISC instruction typically represents the work done by several RISC instructions. But that doesn’t mean it’s faster.

Anyway, no approach is inherently better than the other. To understand, imagine the following: João and Maria are in a competition to see who fills a 1000 liter water tank faster. Every 10 minutes, João pours a bucket that has an average of 20 liters of water (sometimes more, sometimes less) into his box. Every 3 seconds, Maria pours a cup of exactly 100 ml into her box. At this rate, both take 8 hours and 20 minutes to finish, tying. In this approach, each dump in the water tank corresponds to an executed instruction and the amount of water poured represents the amount of work performed by such instruction, being John the one who uses an approach analogous to the CISC and Mary an analogue to the RISC. There is no clearly better performance approach.

As for the compiler, it is he who produces the sequence of instructions to be executed, so it is he who is responsible for determining which sequence of instructions to perform the task described in the program to be compiled that would result in the best performance. Obviously, this is not something simple, but it means that his role in improving the analysis of results is critical. A CISC compiler has a much wider range of possible instructions to choose from, which also means that it is much more difficult to know what would be the best possible combination of sequence of instructions to be issued. The RISC compiler has more uniformity in the instructions to be issued, which simplifies the analysis, but probably means producing longer instruction sequences.