I need help creating the Makefile file

Question

# Baseando-se no link: https://www.embarcados.com.br/introducao-ao-makefile/

all: bancoBPE

bancoBPE: main.o
    gcc -o bancoBPE main.o -Wall -Wextra -Werror -Wpedantic

# Não sei direito como compilar esse structs.h sozinho sem ter structs.c

structs.o: structs.h
    gcc -o filacirc.o filacirc.c -Wall -Wextra -Werror -Wpedantic

filacirc.o: filacirc.c filacirc.h
    gcc -o filacirc.o filacirc.c -Wall -Wextra -Werror -Wpedantic

pilhaseq.o: pilhaseq.c pilhaseq.h
    gcc -o pilhaseq.o pilhaseq.c -Wall -Wextra -Werror -Wpedantic

lista.o: lista.c lista.h
    gcc -o lista.o lista.c -Wall -Wextra -Werror -Wpedantic

clean:
    rm -rf *.o *~ bancoBPE

The following terminal error occurred:

$ make
gcc -o bancoBPE main.o -Wall -Wextra -Werror -Wpedantic
/usr/bin/ld: main.o: relocation R_X86_64_32 against `.rodata' can not be         used when making a shared object; recompile with -fPIC
/usr/bin/ld: final link failed: Nonrepresentable section on output
collect2: error: ld returned 1 exit status
makefile:5: recipe for target 'bancoBPE' failed
make: *** [bancoBPE] Error 1

If someone could pass on some material so I can study better, I’d appreciate it. I’m trying to understand how Makefile works, but still not very successful despite reading some references.

Answer 1

Makefiles have very simple structure:

alvo: ingredientes
    regra

Where alvo is the file name that will be created by regra and depends on the ingrediantes (files).

A Makefile always has a main recipe (the first rule), as in:

bancoBPE: main.o structs.o pilhaseq.o lista.o filecirc.o
    $(CC) -o $@ $^

Here, $@ is replaced by alvo and ː by all ingredientes. The CC variable is the C compiler (used here as Linker).

On the basis of the make decides which other revenues should be availed... If main. the does not exist, it will avail the recipe to build it, for example... Or, if main. c, in the recipe where the alvo is main. the have a timestamp newer than the file main. the (the target), then the rule is executed:

main.o: main.c structs.h lista.h pilhaseq.h filecirc.h
    $(CC) $(CFLAGS) -c -o $@ $<

Here, $< is the first item in the list of ingredientes and the CFLAGS variable is used to inform the compiler options.

Fortunately make provides some shortcuts... It knows how to compile files . c and a rule can be omitted. Above, we would only need:

main.o: main.c structs.h lista.h pilhaseq.h filecirc.h

The make still allows "fake" targets, for example:

all: bancoBPE

clean:
    rm -f *.o *~ bancoBPE

But it’s prudent that if we’re using the GNU make, also use pseudo-recipe:

.PHONY: all clean

To say to the make like all and neither clean are files. So, you can call the make with:

$ make all  # all é assumido, se não informado
$ make clean

I find the use of all useful only in cases where there are two or more "main targets".

The make also defines, by itself, the CC and CFLAGS variables, respectively, "cc" and "" (empty string), but you can change them at the beginning of the Makefile file:

CC=x86_64-w64-mingw32-gcc
CFLAGS=-O2 -march=native -msse4.2