Where are the instructions for a processor stored?

Question

I’m studying computer architecture, and I’m very confused about the instruction set of a processor. When we write something, for example, ADD A1, B1, the processor adds the value of the A1 register to B1 and stores the result in A1. However, how and where is this instruction information stored? Are the instructions stored in the processor itself and inserted at the time of manufacture? For example, a processor with CISC architecture will always be CISC or it is possible to "reprogram" it to be RISC?

Answer 1

However, how and where is this instruction information stored? Instructions are stored in the processor itself and are inserted at the time of manufacture?

The instructions are stored in memory, and searched through specific registers that usually carry names such as data Pointer, stack Pointer, Instruction Pointer, among others. These registers store values that correspond to memory addresses from which the instructions are fetched, and the execution of these same instructions update their values so that they point to the next instruction to be executed. In this way, the processor uses these registers to search the memory for the next instruction to be executed.

Access to main memory is slow, but as these instructions will be accessed multiple times in sequence, so due to the principle of temporal and spatial locality of the instructions and memory, most of the time these instructions will be located in the L1 cache.

Assuming the registrar pointing to the next instruction is called Instruction Pointer, then the process of updating the value of these registers may consist of:

• Only increment the value of Instruction Pointer to take the subsequent instruction or;

• The value of the Instruction Pointer for any other good in the case of conditional or unconditional deviations or;

• In the case of routing call, store the instruction subsequent to the return in memory at a position defined by a register that contains the address of a stack for this (stack Pointer), store the address of the first instruction invoked in the Instruction Pointer, and when the subroutine ends, through the stack Pointer, the value of the subsequent instruction is assigned to the Instruction Pointer.

For example, a processor with CISC architecture will always be CISC or it is possible to "reprogram" it to be RISC?

No, he can’t be reprogrammed. The RISC or CISC architecture corresponds to the internal design of the physical processor, being directly related to the number and organization of electronic nanocomponents (composed almost exclusively of logic ports and flip-flops that in turn are composed of transistors) that compose it.

The main difference between RISC and CISC is the number and complexity of the instructions they are able to interpret. The CISC follows the idea that the processor should be able to decode a large number of different instructions, perhaps in several formats, in order to become powerful and sophisticated. Already the RISC follows the idea that the set of instructions should be minimal and all of them have the same or almost the same format, thus becoming much simpler.

There is also a hybrid RISC and CISC architecture that although it is a CISC instruction processor, internally it corresponds to a RISC processor interpreting a fixed set of CISC instructions, where each CISC instruction is translated into a sequence of RISC instructions. Such set of instructions that make the translation of the CISC to the RISC is given the name of microcode.

The microcode is the only code that is written inside the RISC/CISC hybrid processor as part of its electronic circuit in the form of a series of flip-flops. Since the microcode is written as part of the processor’s electronic microcircuit, it cannot be changed.