How big is a memory address?

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What size of a memory address?

I think a memory address has 32 bits, but I’m seeing it in a Debugger one int, where he separated 4 addresses for him.

So, an address is equal to 32 bits? Because separated 4 addresses and 32 bits already gives 4 bytes?

  • 5

    Show how you are, give more details, it’s hard to understand what you’re talking about. Maybe you’re using wrong terms. Put code, result, screenshot, something that indicates better what you want.

  • 2

    Integer size is one thing, address size is another (and it depends on the architecture/platform used), memory allocation and alignment are something else. Better you [Dit] the question and put more details, so that people can understand what the doubt is and help better.

  • Alexsander, I saw that you posted another question almost the same. There is something that has not yet become clear in the answers?

  • Yes for example on my computer 64-bit addresses so I downloaded a crack me to train my reverse engineering skills , so the key has 15 characters in size and type occupies 4 64-bit addresses , the key and only 15 in size so I got it.

  • 3

    It’s still hard to understand your question! Do you have a screenshot of this Debugger? How do you know it’s an int that’s in these 4 addresses? Try [Dit] the question and put more details, everyone is hard to understand you...

  • 2

    @Alexsanderborgesdamaceno If any of the answers provided met your needs you can accept it. This goes for any question you have asked. And you can vote on all the answers and questions you find useful. This goes for all the website, not only your stuff. See how it works in [tour].

  • I find the question totally acceptable. I interpret it this way: "what is the maximum address size?" considering the offsets (result: pmargreff response). Vote to reopen it

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2 answers

4

Models differ from architecture to architecture, when you say you have a 32-bit memory address, the processor operates and has 32-bit instructions. Using the MIPS microprocessor architecture we have.

Instrução geral MIPS

That is to say:

  • 6 bits for operation code
  • 26 bits for instructions

Within the instructions we can still divide into more parts depending on the type of instruction. And when you start using simulators you usually divide information into more pieces. In your case the following may be happening, you may have used an entire input underestimation thinking you are only passing your integer, but you are doing a complete operation.

Example: ori $t1, $t2, 0x4

I will not go into detail, but in general the instruction has the following format.

inserir a descrição da imagem aqui

This is because most (not all) instructions are sometimes done on top of the Hexadecimal numeric system.

What may be happening is that you may be confusing passing a data to memory with passing an instruction.

Then be sure to write only the dice, not the full instruction. But there is a great possibility that as commented in the other answer your simulator is dividing your word into bytes.

I would like better specification, simulator, and Assembly for which processor is simulating.

  • Opa amigo estou usando x86 da intel , I’m studying about reverse engineering , and type I’m trying to discover a serial of 15 numbers and type has 4 addresses reserved only to quardar the serial , good type each address in my architecture has 64-bits then because the program has separated the key into 4 addresses , a variable (int) has 4 bytes?

  • 3

    @Alexsanderborgesdamaceno If you can edit your original question and add these architectural details, it makes it easier for people to answer. Not everyone will look for the details in the comments.

3

It’s a little confusing. You need to learn and use the right terms to know what you’re talking about.

On a computer running on 32-bit architecture it will have a 32-bit address. Note that 64-bit computers can run in this addressing mode. With 32 bits you can access up to 4GB of memory which is 2 high to 32. When you do not need to access all the address space that the architecture allows you to use only what is needed to save space since each address used, and many are used in a large application, occupies the amount of bytes of your size.

We often use the term "word size" to indicate the size of what you call memory address. The word is the size of the processor register. It is common for the word to be the same size as the register, but it is not required.

Each byte has 8 bits, so to represent a memory address would need 32 bits.

Usually an integer is usually the word size of the processor, so it is the size of the memory address.

If you say you separated it into 4 addresses (the term seems to be wrong), maybe it separated it into 4 bytes. Maybe I split it four ways bytes in hexadecimal format. If there really are 4 integers, each with 4 bytes, you need to figure out what you’re showing, there must be a reason, if is showing this.

But objectively your question is answered: in address space of 32 bits the address size is 4 bytes. As in 64 address space bits is 8 bytes, in 16 address space bits is 2 *bytes and 8 address space bits is 1 byte.

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